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NXP Semiconductors /LPC18xx /CGU /FREQ_MON

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Interpret as FREQ_MON

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RCNT0FCNT0 (RCNT_AND_FCNT_DISABL)MEAS 0 (32_KHZ_OSCILLATOR_D)CLK_SEL0RESERVED

MEAS=RCNT_AND_FCNT_DISABL, CLK_SEL=32_KHZ_OSCILLATOR_D

Description

Frequency monitor register

Fields

RCNT

9-bit reference clock-counter value
FCNT

14-bit selected clock-counter value
MEAS

Measure frequency

0 (RCNT_AND_FCNT_DISABL): RCNT and FCNT disabled

1 (FREQUENCY_COUNTERS_S): Frequency counters started
CLK_SEL

Clock-source selection for the clock to be measured. All other values are reserved.

0 (32_KHZ_OSCILLATOR_D): 32 kHz oscillator (default)

1 (IRC): IRC

2 (ENET_RX_CLK): ENET_RX_CLK

3 (ENET_TX_CLK): ENET_TX_CLK

4 (GP_CLKIN): GP_CLKIN

5 (RESERVED): Reserved

6 (CRYSTAL_OSCILLATOR): Crystal oscillator

7 (PLL0USB): PLL0USB

8 (PLL0AUDIO): PLL0AUDIO

9 (PLL1): PLL1

10 (RESERVED): Reserved

11 (RESERVED): Reserved

12 (IDIVA): IDIVA

13 (IDIVB): IDIVB

14 (IDIVC): IDIVC

15 (IDIVD): IDIVD

16 (IDIVE): IDIVE
RESERVED

Reserved

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data